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西文非书资料1.Verilog digital system design Register transfer level synthesis, testbench, and verification = Ve... Y/TP312/N316-2
馆藏复本:0
可借复本:0 Navabi, Zainalabedin.
Publishing House of Electronics Industry : 2007.
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西文图书2.Verilog digital system design : Register transfer level synthesis, testbench, and verification =... TP312/N316-2
馆藏复本:2
可借复本:1 Zainalabedin Navabi著 ; 夏宇闻改编.
Publishing House of Electronics Industry ; 2007.
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