机读格式显示(MARC)

• 000 01179nam 2200325 a 4500

• 001 0000390243

• 003 SCNU

• 008 040629r20042003cc a b 001 0 eng d

• 020 __ |a 7505396641

• 040 __ |a SCNU |c SCNU

• 041 0_ |a eng |b chi

• 050 00 |a TK7868.D5 |b .C48 2003

• 082 00 |a 621.39/5 |2 21

• 093 __ |a TN431.2 |2 4

• 100 1_ |a Ciletti, Michael D.

• 245 10 |a Advanced digital design with the Verilog HDL = |b Verilog HDL高级数字设计 / |c Michael D. Ciletti 著

• 246 31 |a Verilog HDL高级数字设计

• 260 __ |a Beijing : |b Publishing House of Electronics Industry, |c 2004.

• 300 __ |a xxi, 986 p. : |b ill. ; |c 24 cm.

• 440 _0 |a 国外电子与通信教材系列

• 504 __ |a Includes bibliographical references and index.

• 534 __ |p Reprint. Originally published: |c Upper Saddle River : Prentice Hall, c2003. |z 0130891614.

• 650 _0 |a Digital electronics.

• 650 _0 |a Logic circuits |x Computer-aided design.

• 650 _0 |a Verilog (Computer hardware description language)

• 950 __ |a SCNU |f TN431.2/C572

• 999 __ |t A |A hwei2 |a 20040617 11:08:18 |M zxq |m 20040629 09:24:21 |G zxq |g 20040629 09:24:44

• 000 1000003283

• 991 __ |a 022004001849

• 907 __ |a SCNU |f TN431.2/C572